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TMS320VC5401图片
 产品型号:TMS320VC5401
 库存:2000
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 详细介绍

TMS320VC5401_德州仪器推出定点数字信号处

TMS320VC5401

The TMS320VC5401 fixed-point, digital signal processor (DSP) (hereafter referred to as the 5401 unless otherwise specified) is based on an advanced modified Harvard architecture that has one program memory bus and three data memory buses. This processor provides an arithmetic logic unit (ALU) with a high degree of parallelism, application-specific hardware logic, on-chip memory, and additional on-chip peripherals. The basis of the operational flexibility and speed of this DSP is a highly specialized instruction set.

Separate program and data spaces allow simultaneous access to program instructions and data, providing the high degree of parallelism. Two read operations and one write operation can be performed in a single cycle. Instructions with parallel store and application-specific instructions can fully utilize this architecture. In addition, data can be transferred between data and program spaces. Such parallelism supports a powerful set of arithmetic, logic, and bit-manipulation operations that can be performed in a single machine cycle. In addition, the 5401 includes the control mechanisms to manage interrupts, repeated operations, and function calls.

产品特性
  • Advanced Multibus Architecture With Three Separate 16-Bit Data Memory Buses and One Program Memory Bus
  • 40-Bit Arithmetic Logic Unit (ALU), Including a 40-Bit Barrel Shifter and Two Independent 40-Bit Accumulators
  • 17- × 17-Bit Parallel Multiplier Coupled to a 40-Bit Dedicated Adder for Non-Pipelined Single-Cycle Multiply/Accumulate (MAC) Operation
  • Compare, Select, and Store Unit (CSSU) for the Add/Compare Selection of the Viterbi Operator
  • Exponent Encoder to Compute an Exponent Value of a 40-Bit Accumulator Value in a Single Cycle
  • Two Address Generators With Eight Auxiliary Registers and Two Auxiliary Register Arithmetic Units (ARAUs)
  • Data Bus With a Bus-Holder Feature
  • Extended Addressing Mode for 1M × 16-Bit Maximum Addressable External Program Space
  • 4K x 16-Bit On-Chip ROM
  • 8K x 16-Bit Dual-Access On-Chip RAM
  • Single-Instruction-Repeat and Block-Repeat Operations for Program Code
  • Block-Memory-Move Instructions for Efficient Program and Data Management
  • Instructions With a 32-Bit Long Word Operand
  • Instructions With Two- or Three-Operand Reads
  • Arithmetic Instructions With Parallel Store and Parallel Load
  • Conditional Store Instructions
  • Fast Return From Interrupt
  • On-Chip Peripherals
    • Software-Programmable Wait-State Generator and Programmable Bank Switching
    • On-Chip Phase-Locked Loop (PLL) Clock Generator With Internal Oscillator or External Clock Source
    • Two Multichannel Buffered Serial Ports (McBSPs)
    • Enhanced 8-Bit Parallel Host-Port Interface (HPI8)
    • Two 16-Bit Timers
    • Six-Channel Direct Memory Access (DMA) Controller
  • Software-Programmable Wait-State Generator and Programmable Bank Switching
  • On-Chip Phase-Locked Loop (PLL) Clock Generator With Internal Oscillator or External Clock Source
  • Two Multichannel Buffered Serial Ports (McBSPs)
  • Enhanced 8-Bit Parallel Host-Port Interface (HPI8)
  • Two 16-Bit Timers
  • Six-Channel Direct Memory Access (DMA) Controller
  • Power Consumption Control With IDLE1, IDLE2, and IDLE3 Instructions With Power-Down Modes
  • CLKOUT Off Control to Disable CLKOUT
  • On-Chip Scan-Based Emulation Logic, IEEE Std 1149.1 (JTAG) Boundary Scan Logic
  • 20-ns Single-Cycle Fixed-Point Instruction Execution Time (50 MIPS) for 3.3-V Power Supply (1.8-V Core)
  • 144-Pin Plastic Low-Profile Quad Flatpack (LQFP) (PGE Suffix)
  • 144-Ball MicroStar BGA? (GGU Suffix)
参数parametrics
参数 TMS320VC5401
Applications Communications and Telecom Industrial
Operating Systems DSP/BIOS
DSP 1 C54x
DSP Instruction Type Fixed Point
DSP MHz (Max.) 50
DSP Peak MMACS 50
General Purpose Memory Async SRAM
HPI 1 8-bit HPI
McBSP 2
DMA (Ch) 16-Ch EDMA
IO Supply (V) 3.3 V
Operating Temperature Range (C) -40 to 100
Pin/Package 144LQFP
数据表?(1)
标题 类型 大小 (KB) 日期
TMS320VC5401 Fixed-Point Digital Signal Processor PDF 773 2008年 10月 17日
勘误表?(1)
标题 类型 大小 (KB) 日期
TMS320VC5401 Silicon Errata PDF 90 2001年 7月 31日
用户指南?(5)
标题 类型 大小 (KB) 日期
TMS320C54x Chip Support Library API Reference Guide PDF 1647 2003年 5月 5日
TMS320C54x DSP CPU and Peripherals Reference Set Volume 1 PDF 2156 2001年 3月 31日
TMS320C54x DSP Algebraic Instruction Set Reference Set Volume 3 PDF 1115 2001年 1月 31日
TMS320C54x DSP Mnemonic Instruction Set Reference Set Volume 2 PDF 1096 2001年 1月 31日
TMS320C54x DSP Applications Guide Reference Set Volume 4 PDF 1293 1996年 10月 1日
白皮书?(1)
标题 类型 大小 (KB) 日期
“Get smart” with TI’s embedded analytics technology PDF 2059 2012年 5月 30日
设计套件与评估板?(1)
培训内容 型号 类型
TMS320C5416 DSP 入门套件 (DSK) TMDSDSK5416 评估模块和开发板
软件?(2)
培训内容 型号 类型
TMS320C54x DSP 库 SPRC099 软件库
TMS320C54x 芯片支持库 SPRC132 软件库
开发工具?(3)
培训内容 型号 类型
XDS560 高性能调试探针 XDS560 JTAG 仿真器/分析器
C54x UNIX 仿真器 TMDS324L551-09 电路设计和仿真
Code Composer Studio (CCS) 集成开发环境 (IDE) CCSTUDIO 软件开发工具、IDE、编译器
模型?(2)
标题 种类 类型 大小 (KB) 日期
C5401 GGU BSDL Model BSDL Model ZIP 5?KB 2005年 1月 28日
C5401 PGE BSDL Model BSDL Model ZIP 5?KB 2005年 1月 28日
订购型号Ordering
型号 状态 温度 (oC) 价格(美元) | Quantity 封装 | 引脚 器件标记 封装数量 | 载体
TMS320VC5401PGE50 ACTIVE -40 to 100 3.78 | 1ku LQFP?(PGE) | 144 PGE50 TMS320VC5401 60

这里所列出的美国报价单仅供预算参考,指美元报价(规定订量的每片美元,美国离岸价),如有修改不再另行通知。由于地区关税、商业税、汇率及手续费原因,国际报价可能不同。对于特殊批量报价,请与君硅科技 联络。对于评估板和套件的报价是指一个单位价格。

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