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DS25BR101图片
 产品型号:DS25BR101
 库存:2000
 PDF下载:
 样片:申请
 订货:订购
 详细介绍

DS25BR101_具有发送预强调和接收均衡功

DS25BR101

The DS25BR100 and DS25BR101 are single channel 3.125 Gbps LVDS buffers optimized for high-speed signal transmission over lossy FR-4 printed circuit board backplanes and balanced metallic cables. Fully differential signal paths ensure exceptional signal integrity and noise immunity.

The DS25BR100 and DS25BR101 feature transmit pre-emphasis (PE) and receive equalization (EQ), making them ideal for use as a repeater device. Other LVDS devices with similar IO characteristics include the following products. The DS25BR120 features four levels of pre-emphasis for use as an optimized driver device, while the DS25BR110 features four levels of equalization for use as an optimized receiver device. The DS25BR150 is a buffer/repeater with the lowest power consumption and does not feature transmit pre-emphasis nor receive equalization.

Wide input common mode range allows the receiver to accept signals with LVDS, CML and LVPECL levels; the output levels are LVDS. A very small package footprint requires minimal space on the board while the flow-through pinout allows easy board layout. On the DS25BR100 the differential input and output is internally terminated with a 100? resistor to lower return losses, reduce component count and further minimize board space. For added design flexibility the 100? input terminations on the DS25BR101 have been eliminated. This elimination enables a designer to adjust the termination for custom interconnect topologies and layout.

产品特性
  • DC - 3.125 Gbps Low Jitter, High Noise Immunity, Low Power Operation
  • Receive Equalization Reduces ISI Jitter Due to Media Loss
  • Transmit Pre-Emphasis Drives Lossy Backplanes and Cables
  • On-Chip 100? Input and Output Termination:
    • Minimizes Insertion and Return Losses
    • Reduces Component Count
    • Minimizes Board Space
  • Minimizes Insertion and Return Losses
  • Reduces Component Count
  • Minimizes Board Space
  • DS25BR101 Eliminates On-Chip Input Termination for Added Design Flexibility
  • 7 kV ESD on LVDS I/O Pins Protects Adjoining Components
  • Small 3 mm x 3 mm WSON-8 Space Saving Package
参数parametrics
参数 DS25BR101
Number of Channels (#) 1
Speed (Max) (Gbps) 3.125
SupplyVoltage (Volt) 3.3
Input Compatibility LVDS LVPECL CML
Output Compatibility LVDS
Pin/Package 8WSON
Operating Temperature Range (C) -40 to 85
Approx. Price (US$) 2.33 | 1ku
数据表?(1)
标题 类型 大小 (KB) 日期
DS25BR100/101 3.125Gbps LVDS Buffer w/Transmit Pre-Empha & Rcve Equalization PDF 865 2013年 4月 14日
订购型号Ordering
型号 状态 温度 (oC) 价格(美元) | Quantity 封装 | 引脚 器件标记 封装数量 | 载体
DS25BR101TSD/NOPB ACTIVE -40 to 85 2.33 | 1ku WSON?(NGQ) | 8 2R101 1000 | SMALL T&R
DS25BR101TSDE/NOPB ACTIVE -40 to 85 2.68 | 1ku WSON?(NGQ) | 8 2R101 250 | SMALL T&R
DS25BR101TSDX/NOPB ACTIVE -40 to 85 2.33 | 1ku WSON?(NGQ) | 8 2R101 4500 | LARGE T&R

这里所列出的美国报价单仅供预算参考,指美元报价(规定订量的每片美元,美国离岸价),如有修改不再另行通知。由于地区关税、商业税、汇率及手续费原因,国际报价可能不同。对于特殊批量报价,请与君硅科技 联络。对于评估板和套件的报价是指一个单位价格。

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